1. Field of the Invention
Embodiments of the invention generally relate to solid-state memory. In particular, one or more embodiments of the invention relate to controllers for non-volatile integrated circuit memory circuits.
2. Description of the Related Art
Flash memory is a form of erasable and reprogrammable non-volatile integrated circuit memory. In a flash memory, memory cells are arranged in “blocks” for erasure. After a block has been erased, it is ready for programming if desired. NOR flash memory is a type of flash memory that offers access to individual bytes for retrieval of data, but has relatively low density. NAND flash memory is a type of flash memory that offers relatively high density. The high density is achieved in part by forming columns of cells connected in series. In addition, with NAND flash memory, data is programmed (“written”) and accessed (read or write) in relatively large groups of bytes, such as a page of data.
A “page” of data typically refers to the amount of data that is typically written to and/or read from a NAND flash memory array at a single time. In one or more embodiments, such a page can correspond to a row or to a portion of a row in the NAND flash memory array. For example, a page can include 2,112 bytes, of which 2,048 are normal data bytes and 64 are spare bytes. The spare bytes are typically used for error correction code (ECC) data, wear-leveling information, or other overhead data. The use of error correction increases the robustness of the stored data. Typically, a form of error correction code (ECC) known as a block code is used to generate the error correction code data, such as cyclic redundancy check (CRC) checksums, Hamming codes, Reed-Solomon error correction, or the like. These error correction codes can be used to detect if there were errors in the read data bytes when read and can typically correct errors in the data bytes provided that the errors do not exceed the capability of the error correction code.
Flash memory has many uses. Examples include flash memory hard drives (replacements for hard drives), USB flash drives or thumb drives, mobile phones, digital cameras, digital media players, games, memory cards, navigation devices, personal digital assistants, computers, or the like. Within limits, the error correction codes can correct many errors in the data in the data bytes. However, beyond these limits, data with errors cannot typically be corrected. One disadvantage of conventional techniques is that by the time errors become uncorrectable, it is often too late to take measures to save the data.
Many of the devices that use flash memory for data storage also use an operating system. The operating system serves as an abstraction layer between hardware and other software. For example, a file system and a device driver of the operating system typically provide access to data stored on a memory device. There can be additional layers within an operating system.
FIG. 1 illustrates an example of a portion of a processing environment including a host 100, a memory controller 116, and non-volatile memory devices 106. The memory devices 106 can be NAND flash memory devices. The host 100 can include a microprocessor in the form of a CPU 102 and an operating system 104. The operating system 104 further includes a file system 108 and a device driver 110. It will be understood that the operating system 104 can have support for more than one file system and more than one device driver and other components not relevant to the present discussion.
The CPU 102 executes instructions, including the code of the operating system 104. The code of the file system 108 provides abstraction between low-level information, such as logical addresses for the memory devices 106, and high-level information, such as a file name and directory. The code for the device driver 110 typically handles low-level information for the data transfer to and from the memory devices 106. The device driver 110 can provide code for the CPU 102 to directly access the memory device 106 (known as processor input/output) or can provide code that activates the memory controller 116 to handle the bus control so that data is transferred to or available from the memory device 106. The use of the memory controller 116 frees up the CPU 102 to handle other tasks.
With processor input/output (PIO), the device driver 110 can handle ECC information associated with write operations and read operations. In many operating systems, many device drivers exist to support reading to and writing from various different types of memory devices. In addition to the mapping by the file system 108, many NAND flash memory devices utilize virtual mapping, which can be referred to as a flash translation layer, between logical addresses and physical addresses for bad block management and wear out management.
One technique that is commonly used with conventional hard disks used for data storage in conventional processing environments is known as a redundant array of inexpensive disks (RAID). In a RAID system, such as RAID-3, a redundant hard disk stores an exclusive-OR (XOR) of the other hard disks. For example, a third hard disk can contain an XOR of the contents of hard disks 1 and 2. Thus, if a hard disk catastrophically fails, the contents of the failed hard disk can be rebuilt from the remaining hard disks. However, if more than one hard disk fails catastrophically, the data cannot be rebuilt.
Catastrophic failures are not common, however, with solid-state non-volatile memory devices, such as NAND flash. Rather, solid-state non-volatile memory devices are more likely to suffer from individual bit errors.